We propose an efficient deep convolutional neural network for a super‐resolution which is capable of multiple‐quality input, by analyzing the input quality and choosing appropriate features automatically. To implement the network in an FPGA and an ASIC, we employ a network trimming technique to compress the neural network.

+More

superresolution input network trimming technique deep convolutional neural network

Soo Young Yoon, Chang Gone Kim, Sanglyn Lee, Ilho Kim, Hee Jung Hong,Min Beom Kim,.Efficient multiquality super‐resolution using a deep convolutional neural network for an FPGA implementation. (),.

Soo Young Yoon, et al."Efficient multiquality super‐resolution using a deep convolutional neural network for an FPGA implementation"

Soo Young Yoon, Chang Gone Kim, Sanglyn Lee, Ilho Kim, Hee Jung Hong,Min Beom Kim,"Efficient multiquality super‐resolution using a deep convolutional neural network for an FPGA implementation"